Since their introduction, computers have increased in size and capability over the years. As computer capability increased, the computers were required to serve several different functions. Traditionally, when a number of users desired access to a computer, a system called "time sharing" was implemented where many different users could access the computer. However, as time progressed many more complex problems arose that required simultaneous processing capabilities. At that time, most computers were large central processing systems. This type of architecture which consisted of one central processor with a large memory bank and dedicated input/output (I/O) provided to be very burdensome when used as solutions for these increasingly complex problems. One of the first problems that arose was the need to separate the I/O section from the main CPU so that the CPU could work on a problem while the I/O could independently input or output information.
In the mid to late 60's, minicomputers emerged as a new type of computer architecture. A minicomputer consisted of a CPU that was somewhat smaller than that in most of the existing large computer systems. A minicomputer contained much less memory than the larger traditional computer system. However, the introduction of the minicomputer allowed certain intelligent devices to be built. An intelligent device is one that contains its own processing capability that can operate independently from any other processing system to which it is connected. This new minicomputer architecture solves many of the complex problems, such as the independent I/O problem.
At this same time, integrated circuitry was evolving. In the 1960's integrated circuitry consisted of small scale integration (SSI) which consisted of 10 to 12 gates per chip. During the late 1960's, medium scale integration was introduced which increased the gate count per chip to 100-1,000. Then in the 1970's, large scale integration (LSI) and very large scale integration (VLSI) was introduced pushing the gate count per chip up to as high as 50,000. As the gate count increased, the capability of these chips increased proportionately. Then around the same timeframe in the 1970's, the first computer on the board systems was introduced. These systems combined a CPU and memory on the same printed circuit board. It became possible to experiment with certain computer architecture. To expand computer capability, three approaches were possible. The first was to increase word size which increases precision. For control applications, this approach does not offer many advantages. The second approach was to increase memory size. This approach become costly unless memory architectures such as cache memories were used. For computers on a board or computers on a chip the amount of area available for memory was limited so this approach was not a complete solution. The third approach, increasing the number of CPU's , seemed to be the most practical.
New architectures emerged containing centrally controlled minicomputers tied together. Two main types of architectures emerged, federated systems and distributed systems. A federated system contained many processors tied to a single or multiple data busses where one processor was the master and controlled transmission of data over the data bus or data busses. Usually in a federated system, each processor was completely and totally independent in hardware and software from the other processors. That is, each processor had its own processing unit and its own memory. The advantage of the federated system is that one processor controlled a system that allowed many processors to service many different users. However, the disadvantage was the complexity of the system control software of the federated system; that is, the software that was used to control the different processors on the data bus or data busses. The software could become quite complex and could also generate inefficiencies in that not all of the processors on line would be used to their full capability. The other alternative in computer architecture was that distributed system. This system consisted of different processing units connected via a data bus or data busses as in the federated system but control was not exercised by a single processor over the remaining processors. Rather the control either was transferred from processor to processor around the data bus loop as in a pooling protocol or each processor could access the bus as required independently of the other processors. In addition, some distributed system processors were allowed to share the same memory modules, thus allowing for one processor to communicate with another processor without actually accessing the emerged, federated systems and distributed systems. A federated system contained many processors tied to a single or multiple data busses where one processor was the master and controlled transmission of data over the data bus or data busses. Usually in a federated system, each processor was completely and totally independent in hardware and software from the other processors. That is, each processor had its own processing unit and its own memory. The advantage of the federated system is that one processor controlled a system that allowed many processors to service many different users. However, the disadvantage was the complexity of the system control software of the federated system; that is, the software that was used to control the different processors on the data bus or data busses. The software could become quite complex and could also generate inefficiencies in that not all of the processors on line would be used to their full capability. The other alternative in computer architecture was the distributed system. This system consisted of different processing units connected via a data bus or data busses as in the federated system but control was not exercised by a single processor over the remaining processors. Rather the control either was transferred from processor to processor around the data bus loop as in a pooling protocol or each processor could access the bus as required independently of the other processors. In addition, some distributed system processors were allowed to share the same memory modules, thus allowing for one processor to communicate with another processor without actually accessing the data bus. The data busses became the key to both types of computer architecture. As a result, many different data bus protocols emerged. The most popular data bus protocol is the EIA RS-232 interface. The RS-232 interface standard provides an interface between data terminal equipment and data communication equipment using serial binary data exchange. The standard specifies electrical signal characteristics, connector pin assignments, functional interchange circuit descriptions for serial binary data exchange. Another data bus standard is the IEEE 488 which is a digital interface for programmable instrumentation. A multiplexing data bus standard is provided in MIL-STD-1553 which is a standard for bit serial transmission employing a central bus controller. As these bus protocol standards become more sophisticated, the software required to control these bus architectures become more complex. A reference for the evolution of distributed computer systems is Distributed Micro Minicomputer Systems by Tay Witzmann, Prentiss-Hall, 1980. The invention disclosed avoids all problems related to the data bus structure and the data bus software by disclosing a multi processor system that can share the same semiconductor chip.
The forerunners of present day microprocessor chips were the semiconductor arrays used in miniature electronic calculators, such as shown in U.S. Pat. No. 3,891,921, issued June 25, 1974 to Kilby, Merryman and VanTassel, assigned to Texas Instruments. In the years since the invention of these integrated arrays for calculators, many advances in technology have resulted in great improvements in size, power, cost and functions and reliability of semiconductor chips. Earlier microprocessor systems that have a similar type of single processor structure are U.S. Pat. No. 3,991,305, issued Nov. 9, 1976 by Caudel and Raymond assigned to Texas Instruments and U.S. Pat. No. 4,064,544 issued Dec. 20, 1977, entitled "Microcomputer with Code Conversation" by Graham F. Tubbs assigned to Texas Instruments Incorporated. These two patents disclose microprocessor structure in a single form that is similar to the present invention in a dual form.